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An Enhanced Method for Running Embedded Applications in a Power-Efficient Manner
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Author(s): N. M. G. Kumar (Sree Vidyanikethan Engineering College, Mohan Babu University, India), Ayaz Ahmad (National Institute of Technology, Mahendru, India), Dankan Gowda V. (B.M.S. Institute of Technology and Management, India), S. Lokesh (PSG Institute of Technology and Applied Research, India)and Kirti Rahul Rahul Kadam (Institute of Management Kolhapur, Bharati Vidyapeeth (Deemed), India)
Copyright: 2023
Pages: 21
Source title:
Energy Systems Design for Low-Power Computing
Source Author(s)/Editor(s): Rathishchandra Ramachandra Gatti (Sahyadri College of Engineering and Management, India), Chandra Singh (Sahyadri College of Engineering and Management, India), Srividya P. (RV College of Engineering, India)and Sandeep Bhat (Sahyadri College of Engineering and Management, India)
DOI: 10.4018/978-1-6684-4974-5.ch013
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Abstract
Many modern items that are in widespread use have embedded systems. Due of embedded processing's ability to provide complex functions and a rich user experience, it has grown commonplace in many types of electronic products during the last 20 years. Power consumption in embedded systems is regarded as a crucial design criterion among other factors like area, testability, and safety. Low power consumption has therefore become a crucial consideration in the design of embedded microprocessors. The proposed new method takes into consideration both the spatial and temporal locality of the accessed data. In the chapter, the new cache replacement is combined with an efficient cache partitioning method to improve the cache hit rate. In this work, a new modification is proposed for the instruction set design to be used in custom made processors.
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