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A Simulator for Large-Scale Parallel Computer Architectures

A Simulator for Large-Scale Parallel Computer Architectures
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Author(s): Curtis L. Janssen (Sandia National Laboratories, USA), Helgi Adalsteinsson (Sandia National Laboratories, USA), Scott Cranford (Sandia National Laboratories, USA), Joseph P. Kenny (Sandia National Laboratories, USA), Ali Pinar (Sandia National Laboratories, USA), David A. Evensky (Sandia National Laboratories, USA)and Jackson Mayo (Sandia National Laboratories, USA)
Copyright: 2012
Pages: 17
Source title: Technology Integration Advancements in Distributed Systems and Computing
Source Author(s)/Editor(s): Nik Bessis (Edge Hill University, UK)
DOI: 10.4018/978-1-4666-0906-8.ch011

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Abstract

Efficient design of hardware and software for large-scale parallel execution requires detailed understanding of the interactions between the application, computer, and network. The authors have developed a macro-scale simulator (SST/macro) that permits the coarse-grained study of distributed-memory applications. In the presented work, applications using the Message Passing Interface (MPI) are simulated; however, the simulator is designed to allow inclusion of other programming models. The simulator is driven from either a trace file or a skeleton application. Trace files can be either a standard format (Open Trace Format) or a more detailed custom format (DUMPI). The simulator architecture is modular, allowing it to easily be extended with additional network models, trace file formats, and more detailed processor models. This paper describes the design of the simulator, provides performance results, and presents studies showing how application performance is affected by machine characteristics.

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