The IRMA Community
Newsletters
Research IRM
Click a keyword to search titles using our InfoSci-OnDemand powered search:
|
Performance Analysis of Mixed-Wall CNT Interconnects Using Colliding Bodies Optimization Technique
|
|
Author(s): Girish Kumar Mekala (Vidya Jyothi Institute of Technology, India), Yash Agrawal (Dhirubhai Ambani Institute of Information and Communication Technology, Gandhinagar, India), Rajeevan Chandel (National Institute of Technology, Hamirpur, India)and Ashwani Kumar (National Institute of Technology, Hamirpur, India)
Copyright: 2020
Pages: 23
Source title:
Major Applications of Carbon Nanotube Field-Effect Transistors (CNTFET)
Source Author(s)/Editor(s): Balwinder Raj (National Institute of Technical Teachers Training and Research, Chandigarh, India), Mamta Khosla (Dr. B. R. Ambedkar National Institute of Technology, Jalandhar, India)and Amandeep Singh (National Institute of Technology, Srinagar, India)
DOI: 10.4018/978-1-7998-1393-4.ch009
Purchase
|
Abstract
In recent years, carbon nanotube (CNT) interconnects have emerged as a potential alternative to copper interconnects due to their several magnificent properties. Due to fabrication issues, realization of densely packed CNTs with uniform diameters in a bundle structure is difficult to achieve. Consequently, it is advantageous to obtain a combination of CNTs with non-uniform diameters in the bundle, thereby leading to a densely packed mixed-wall CNT bundle (MWCB). In a MWCB structure, tube density plays a major role to determine the parasitic elements associated with the interconnects. For this, prospectively, colliding bodies optimization (CBO) technique has been incorporated. It is inferred from the study that the overall crosstalk noise, delay, and power dissipation of MWCB interconnect with higher tube density (i.e., obtained using CBO technique) are lesser than other CNT structures. Henceforth, it is determined from the proposed work that prospective CBO technique for advanced MWCB structure is highly efficient and effective for on-chip interconnects in IC designs.
Related Content
|
Wassim Jaber.
© 2024.
24 pages.
|
|
Hussein A.H. Jaber, Zahraa Saleh, Wassim Jaber, Adnan Badran, Hatem Nasser.
© 2024.
17 pages.
|
|
Sakshi Garg, Kunal Arora, Sumita Singh, K. Nagarajan.
© 2024.
20 pages.
|
|
Wassim Jaber.
© 2024.
14 pages.
|
|
Ray Gutierrez Jr..
© 2024.
22 pages.
|
|
Wassim Jaber, Hussein A.H. Jaber, Ramzi Jaber, Zahraa Saleh.
© 2024.
16 pages.
|
|
Zahraa Saleh, Wassim Jaber, Ali Jaber, Edmond Cheble, Mikhael Bechelany, Akram Hijazi, David Cornu, Ghassan Mahmoud Ibrahim.
© 2024.
22 pages.
|
|
|