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Low Power Design Technology From MOSFETs to CFETs
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Author(s): Chinmayee Dutta (O.U.T.R., India), Ananya Dastidar (O.U.T.R., India)and Kanhu Charan Bhuyan (O.U.T.R., India)
Copyright: 2025
Pages: 48
Source title:
Exploring the Intricacies of Digital and Analog VLSI
Source Author(s)/Editor(s): Koushik Guha (National Institute of Technology, Silchar, India), Jyoti Kandpal (Graphic Era Hill University, Dehradun, India)and Swagata Devi (Faculty of Engineering, Assam Down Town University, India)
DOI: 10.4018/979-8-3693-8084-0.ch001
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Abstract
This chapter gives an overview of the trends in semiconductor devices as we move toward low power applications. Power consumption is a critical factor driving the evolution of transistor technologies in semiconductor electronics. To overcome the limitations faced by MOSFETs, the semiconductor industry has explored a variety of advanced multi-gate FET structures and novel substrate materials, each offering unique advantages and challenges regarding power consumption. These emerging FET technologies, include multi-gate FET structures, nano-FETs, and novel material FETs. This chapter presents an overview in emerging Field Effect Transistor (FET) technologies, highlighting challenges faced by traditional transistors as device sizes shrink below 90 nm.
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