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An Aspect-Oriented Approach to Hardware Fault Tolerance for Embedded Systems

An Aspect-Oriented Approach to Hardware Fault Tolerance for Embedded Systems
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Author(s): David de Andrés (Universitat Politècnica de València, Spain), Juan–Carlos Ruiz (Universitat Politècnica de València, Spain), Jaime Espinosa (Universitat Politècnica de València, Spain)and Pedro Gil (Universitat Politècnica de València, Spain)
Copyright: 2014
Pages: 27
Source title: Handbook of Research on Embedded Systems Design
Source Author(s)/Editor(s): Alessandra Bagnato (Softeam R&D, France), Leandro Soares Indrusiak (University of York, UK), Imran Rafiq Quadri (Softeam R&D, France)and Matteo Rossi (Politecnico di Milano, Italy)
DOI: 10.4018/978-1-4666-6194-3.ch006

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Abstract

The steady reduction of transistor size has brought embedded solutions into everyday life. However, the same features of deep-submicron technologies that are increasing the application spectrum of these solutions are also negatively affecting their dependability. Current practices for the design and deployment of hardware fault tolerance and security strategies remain in practice specific (defined on a case-per-case basis) and mostly manual and error prone. Aspect orientation, which already promotes a clear separation between functional and non-functional (dependability and security) concerns in software designs, is also an approach with a big potential at the hardware level. This chapter addresses the challenging problems of engineering such strategies in a generic way via metaprogramming, and supporting their subsequent instantiation and deployment on specific hardware designs through open compilation. This shows that promoting a clear separation of concerns in hardware designs and producing a library of generic, but reusable, hardware fault and intrusion tolerance mechanisms is a feasible reality today.

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